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    Searched refs:mmCP_HQD_PQ_WPTR_POLL_ADDR_HI (Results 1 - 13 of 13) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_amdkfd_gfx_v10.c 323 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI),
amdgpu_amdkfd_gfx_v9.c 313 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI),
amdgpu_gfx_v10_0.c 3426 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,
amdgpu_gfx_v9_0.c 3533 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
polaris10_pwrvirus.h 1512 { 0x000000b4, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI },
1522 { 0x000000b4, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI },
1532 { 0x000000b4, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI },
1542 { 0x000000b4, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI },
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h 583 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x3253
gfx_7_2_d.h 596 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x3253
gfx_8_0_d.h 646 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x3253
gfx_8_1_d.h 646 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x3253
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 2844 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1253
gc_9_1_offset.h 3072 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1253
gc_9_2_1_offset.h 3028 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1253
gc_10_1_0_offset.h 5310 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1fb7
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