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    Searched refs:mmCP_HQD_SEMA_CMD (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h 595 #define mmCP_HQD_SEMA_CMD 0x325f
gfx_7_2_d.h 608 #define mmCP_HQD_SEMA_CMD 0x325f
gfx_8_0_d.h 659 #define mmCP_HQD_SEMA_CMD 0x325f
gfx_8_1_d.h 659 #define mmCP_HQD_SEMA_CMD 0x325f
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v7_0.c 3040 mqd->cp_hqd_sema_cmd = RREG32(mmCP_HQD_SEMA_CMD);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 2868 #define mmCP_HQD_SEMA_CMD 0x125f
gc_9_1_offset.h 3096 #define mmCP_HQD_SEMA_CMD 0x125f
gc_9_2_1_offset.h 3052 #define mmCP_HQD_SEMA_CMD 0x125f
gc_10_1_0_offset.h 5334 #define mmCP_HQD_SEMA_CMD 0x1fc3
    [all...]

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