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Searched refs:mmCP_MEC_ME1_UCODE_ADDR (Results 1 - 15 of 15) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_psp_v10_0.c	`276 *sram_addr_reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_MEC_ME1_UCODE_ADDR);`
amdgpu_psp_v12_0.c	`380 *sram_addr_reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_MEC_ME1_UCODE_ADDR);`
amdgpu_psp_v3_1.c	`456 *sram_addr_reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_MEC_ME1_UCODE_ADDR);`
amdgpu_psp_v11_0.c	`609 *sram_addr_reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_MEC_ME1_UCODE_ADDR);`
amdgpu_gfx_v10_0.c	`2948 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, 0); 2954 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, adev->gfx.mec_fw_version);`
amdgpu_gfx_v7_0.c	`2753 WREG32(mmCP_MEC_ME1_UCODE_ADDR, 0); 2756 WREG32(mmCP_MEC_ME1_UCODE_ADDR, 0);`
amdgpu_gfx_v9_0.c	`3291 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, 3297 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR,`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h	`252 #define mmCP_MEC_ME1_UCODE_ADDR 0x305c`
gfx_7_2_d.h	`254 #define mmCP_MEC_ME1_UCODE_ADDR 0x305c`
gfx_8_0_d.h	`283 #define mmCP_MEC_ME1_UCODE_ADDR 0xf81a`
gfx_8_1_d.h	`284 #define mmCP_MEC_ME1_UCODE_ADDR 0xf81a`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`6740 #define mmCP_MEC_ME1_UCODE_ADDR 0x581a`
gc_9_1_offset.h	`6964 #define mmCP_MEC_ME1_UCODE_ADDR 0x581a`
gc_9_2_1_offset.h	`6992 #define mmCP_MEC_ME1_UCODE_ADDR 0x581a`
gc_10_1_0_offset.h	`[all...]`

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