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    Searched refs:mmCP_MEC_ME1_UCODE_DATA (Results 1 - 15 of 15) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_psp_v10_0.c 277 *sram_data_reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_MEC_ME1_UCODE_DATA);
amdgpu_psp_v12_0.c 381 *sram_data_reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_MEC_ME1_UCODE_DATA);
amdgpu_psp_v3_1.c 457 *sram_data_reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_MEC_ME1_UCODE_DATA);
amdgpu_psp_v11_0.c 610 *sram_data_reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_MEC_ME1_UCODE_DATA);
amdgpu_gfx_v10_0.c 2951 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_DATA,
amdgpu_gfx_v7_0.c 2755 WREG32(mmCP_MEC_ME1_UCODE_DATA, le32_to_cpup(fw_data++));
amdgpu_gfx_v9_0.c 3294 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_DATA,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h 253 #define mmCP_MEC_ME1_UCODE_DATA 0x305d
gfx_7_2_d.h 255 #define mmCP_MEC_ME1_UCODE_DATA 0x305d
gfx_8_0_d.h 284 #define mmCP_MEC_ME1_UCODE_DATA 0xf81b
gfx_8_1_d.h 285 #define mmCP_MEC_ME1_UCODE_DATA 0xf81b
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 6744 #define mmCP_MEC_ME1_UCODE_DATA 0x581b
gc_9_1_offset.h 6968 #define mmCP_MEC_ME1_UCODE_DATA 0x581b
gc_9_2_1_offset.h 6996 #define mmCP_MEC_ME1_UCODE_DATA 0x581b
gc_10_1_0_offset.h     [all...]

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