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    Searched refs:mmCP_PWR_CNTL (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h 494 #define mmCP_PWR_CNTL 0x3078
gfx_7_0_d.h 256 #define mmCP_PWR_CNTL 0x3078
gfx_7_2_d.h 258 #define mmCP_PWR_CNTL 0x3078
gfx_8_0_d.h 290 #define mmCP_PWR_CNTL 0x3078
gfx_8_1_d.h 290 #define mmCP_PWR_CNTL 0x3078
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 2477 #define mmCP_PWR_CNTL 0x1078
gc_9_1_offset.h 2754 #define mmCP_PWR_CNTL 0x1078
gc_9_2_1_offset.h 2692 #define mmCP_PWR_CNTL 0x1078
gc_10_1_0_offset.h 4818 #define mmCP_PWR_CNTL 0x1e18
    [all...]

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