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Searched refs:mmCP_RB0_BASE_HI (Results 1 - 12 of 12) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h	`198 #define mmCP_RB0_BASE_HI 0x30b1`
gfx_7_2_d.h	`198 #define mmCP_RB0_BASE_HI 0x30b1`
gfx_8_0_d.h	`222 #define mmCP_RB0_BASE_HI 0x30b1`
gfx_8_1_d.h	`223 #define mmCP_RB0_BASE_HI 0x30b1`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v10_0.c	`2820 WREG32_SOC15(GC, 0, mmCP_RB0_BASE_HI, upper_32_bits(rb_addr));`
amdgpu_gfx_v7_0.c	`2655 WREG32(mmCP_RB0_BASE_HI, upper_32_bits(rb_addr));`
amdgpu_gfx_v8_0.c	`4309 WREG32(mmCP_RB0_BASE_HI, upper_32_bits(rb_addr));`
amdgpu_gfx_v9_0.c	`3218 WREG32_SOC15(GC, 0, mmCP_RB0_BASE_HI, upper_32_bits(rb_addr));`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`2584 #define mmCP_RB0_BASE_HI 0x10b1`
gc_9_1_offset.h	`2854 #define mmCP_RB0_BASE_HI 0x10b1`
gc_9_2_1_offset.h	`2788 #define mmCP_RB0_BASE_HI 0x10b1`
gc_10_1_0_offset.h	`4922 #define mmCP_RB0_BASE_HI 0x1e51 [all...]`

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