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    Searched refs:mmCP_RB1_ACTIVE (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v10_0.c 2856 WREG32_SOC15(GC, 0, mmCP_RB1_ACTIVE, 1);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 5134 #define mmCP_RB1_ACTIVE 0x1f41
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