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    Searched refs:mmCP_ROQ1_THRESHOLDS (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h 532 #define mmCP_ROQ1_THRESHOLDS 0x21D5
gfx_7_0_d.h 536 #define mmCP_ROQ1_THRESHOLDS 0x21d5
gfx_7_2_d.h 549 #define mmCP_ROQ1_THRESHOLDS 0x21d5
gfx_8_0_d.h 602 #define mmCP_ROQ1_THRESHOLDS 0x21d5
gfx_8_1_d.h 602 #define mmCP_ROQ1_THRESHOLDS 0x21d5
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 216 #define mmCP_ROQ1_THRESHOLDS 0x01d5
gc_9_1_offset.h 216 #define mmCP_ROQ1_THRESHOLDS 0x01d5
gc_9_2_1_offset.h 210 #define mmCP_ROQ1_THRESHOLDS 0x01d5
gc_10_1_0_offset.h 2220 #define mmCP_ROQ1_THRESHOLDS 0x0f75
    [all...]

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