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    Searched refs:mmCRTC0_CRTC_CRC0_DATA_RG (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/
amdgpu_dce120_timing_generator.c 1201 value = dm_read_reg_soc15(tg->ctx, mmCRTC0_CRTC_CRC0_DATA_RG,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_8_0_d.h 728 #define mmCRTC0_CRTC_CRC0_DATA_RG 0x1bd9
dce_10_0_d.h 839 #define mmCRTC0_CRTC_CRC0_DATA_RG 0x1bd9
dce_11_0_d.h 710 #define mmCRTC0_CRTC_CRC0_DATA_RG 0x1bd9
dce_11_2_d.h 717 #define mmCRTC0_CRTC_CRC0_DATA_RG 0x1bd9
dce_12_0_offset.h 4226 #define mmCRTC0_CRTC_CRC0_DATA_RG 0x0728
    [all...]

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