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    Searched refs:mmCRTC0_CRTC_MASTER_UPDATE_MODE (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/
amdgpu_dce120_hw_sequencer.c 186 HW_REG_CRTC(mmCRTC0_CRTC_MASTER_UPDATE_MODE, controller_id),
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_11_0_d.h 542 #define mmCRTC0_CRTC_MASTER_UPDATE_MODE 0x1bbe
dce_11_2_d.h 549 #define mmCRTC0_CRTC_MASTER_UPDATE_MODE 0x1bbe
dce_12_0_offset.h 4178 #define mmCRTC0_CRTC_MASTER_UPDATE_MODE 0x070f
    [all...]

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