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Searched refs:mmCRTC0_CRTC_V_SYNC_A_CNTL (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/
amdgpu_dce120_timing_generator.c	`319 mmCRTC0_CRTC_V_SYNC_A_CNTL,`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h	`559 #define mmCRTC0_CRTC_V_SYNC_A_CNTL 0x1B8F`
dce_8_0_d.h	`252 #define mmCRTC0_CRTC_V_SYNC_A_CNTL 0x1b8f`
dce_10_0_d.h	`287 #define mmCRTC0_CRTC_V_SYNC_A_CNTL 0x1b8f`
dce_11_0_d.h	`227 #define mmCRTC0_CRTC_V_SYNC_A_CNTL 0x1b8f`
dce_11_2_d.h	`234 #define mmCRTC0_CRTC_V_SYNC_A_CNTL 0x1b8f`
dce_12_0_offset.h	`4088 #define mmCRTC0_CRTC_V_SYNC_A_CNTL 0x06e2 [all...]`

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