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    Searched refs:mmCRTCV_MASTER_UPDATE_MODE (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
amdgpu_dce110_timing_generator_v.c 71 mmCRTCV_MASTER_UPDATE_MODE, value);
75 dm_write_reg(tg->ctx, mmCRTCV_MASTER_UPDATE_MODE, value);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_11_0_d.h 7459 #define mmCRTCV_MASTER_UPDATE_MODE 0x47be

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