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    Searched refs:mmDCCG_PLL1_PLL_POST_DIV (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h	1171 #define mmDCCG_PLL1_PLL_POST_DIV 0x1712
dce_8_0_d.h	1098 #define mmDCCG_PLL1_PLL_POST_DIV 0x1716

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