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    Searched refs:mmDCP0_CUR_CONTROL (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h 1489 #define mmDCP0_CUR_CONTROL 0x1A66
dce_8_0_d.h 2231 #define mmDCP0_CUR_CONTROL 0x1a66
dce_10_0_d.h 3080 #define mmDCP0_CUR_CONTROL 0x1a66
dce_11_0_d.h 2827 #define mmDCP0_CUR_CONTROL 0x1a66
dce_11_2_d.h 4065 #define mmDCP0_CUR_CONTROL 0x1a66
dce_12_0_offset.h 3690 #define mmDCP0_CUR_CONTROL 0x05a9
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