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    Searched refs:mmDCP0_INPUT_GAMMA_CONTROL (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h 1568 #define mmDCP0_INPUT_GAMMA_CONTROL 0x1A10
dce_8_0_d.h 1643 #define mmDCP0_INPUT_GAMMA_CONTROL 0x1a10
dce_10_0_d.h 2492 #define mmDCP0_INPUT_GAMMA_CONTROL 0x1a10
dce_11_0_d.h 2386 #define mmDCP0_INPUT_GAMMA_CONTROL 0x1a10
dce_11_2_d.h 3617 #define mmDCP0_INPUT_GAMMA_CONTROL 0x1a10
dce_12_0_offset.h 3562 #define mmDCP0_INPUT_GAMMA_CONTROL 0x0569
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