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Searched refs:mmDCP0_REGAMMA_CONTROL (Results 1 - 6 of 6) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h	`1634 #define mmDCP0_REGAMMA_CONTROL 0x1AA0`
dce_8_0_d.h	`2602 #define mmDCP0_REGAMMA_CONTROL 0x1aa0`
dce_10_0_d.h	`3381 #define mmDCP0_REGAMMA_CONTROL 0x1aa0`
dce_11_0_d.h	`3142 #define mmDCP0_REGAMMA_CONTROL 0x1aa0`
dce_11_2_d.h	`4373 #define mmDCP0_REGAMMA_CONTROL 0x1aa0`
dce_12_0_offset.h	`3766 #define mmDCP0_REGAMMA_CONTROL 0x05e0 [all...]`

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