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    Searched refs:mmDCP1_REGAMMA_CONTROL (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h 1797 #define mmDCP1_REGAMMA_CONTROL 0x1DA0
dce_8_0_d.h 2603 #define mmDCP1_REGAMMA_CONTROL 0x1da0
dce_10_0_d.h 3382 #define mmDCP1_REGAMMA_CONTROL 0x1ca0
dce_11_0_d.h 3143 #define mmDCP1_REGAMMA_CONTROL 0x1ca0
dce_11_2_d.h 4374 #define mmDCP1_REGAMMA_CONTROL 0x1ca0
dce_12_0_offset.h 4544 #define mmDCP1_REGAMMA_CONTROL 0x07e0
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