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    Searched refs:mmDCP2_REGAMMA_CONTROL (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h 1960 #define mmDCP2_REGAMMA_CONTROL 0x40A0
dce_8_0_d.h 2604 #define mmDCP2_REGAMMA_CONTROL 0x40a0
dce_10_0_d.h 3383 #define mmDCP2_REGAMMA_CONTROL 0x1ea0
dce_11_0_d.h 3144 #define mmDCP2_REGAMMA_CONTROL 0x1ea0
dce_11_2_d.h 4375 #define mmDCP2_REGAMMA_CONTROL 0x1ea0
dce_12_0_offset.h 5322 #define mmDCP2_REGAMMA_CONTROL 0x09e0
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