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Searched refs:mmDCP3_REGAMMA_CONTROL (Results 1 - 6 of 6) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h	`2123 #define mmDCP3_REGAMMA_CONTROL 0x43A0`
dce_8_0_d.h	`2605 #define mmDCP3_REGAMMA_CONTROL 0x43a0`
dce_10_0_d.h	`3384 #define mmDCP3_REGAMMA_CONTROL 0x40a0`
dce_11_0_d.h	`3145 #define mmDCP3_REGAMMA_CONTROL 0x40a0`
dce_11_2_d.h	`4376 #define mmDCP3_REGAMMA_CONTROL 0x40a0`
dce_12_0_offset.h	`6100 #define mmDCP3_REGAMMA_CONTROL 0x0be0 [all...]`

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