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    Searched refs:mmDCP5_DEGAMMA_CONTROL (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h 2340 #define mmDCP5_DEGAMMA_CONTROL 0x4958
dce_8_0_d.h 2159 #define mmDCP5_DEGAMMA_CONTROL 0x4958
dce_10_0_d.h 3008 #define mmDCP5_DEGAMMA_CONTROL 0x4458
dce_11_0_d.h 2762 #define mmDCP5_DEGAMMA_CONTROL 0x4458
dce_11_2_d.h 3993 #define mmDCP5_DEGAMMA_CONTROL 0x4458
dce_12_0_offset.h 7558 #define mmDCP5_DEGAMMA_CONTROL 0x0f9e
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