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    Searched refs:mmDCP5_OVL_DFQ_STATUS (Results 1 - 3 of 3) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h	2400 #define mmDCP5_OVL_DFQ_STATUS 0x492A
dce_8_0_d.h	1830 #define mmDCP5_OVL_DFQ_STATUS 0x492a
dce_10_0_d.h	2679 #define mmDCP5_OVL_DFQ_STATUS 0x442a

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