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    Searched refs:mmDC_EDC_CSINVOC_CNT (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_4_1_offset.h 131 #define mmDC_EDC_CSINVOC_CNT 0x1192
gc_9_0_offset.h 2650 #define mmDC_EDC_CSINVOC_CNT 0x1192
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v9_4.c 51 { SOC15_REG_ENTRY(GC, 0, mmDC_EDC_CSINVOC_CNT), 0, 1, 1 },
137 SOC15_REG_ENTRY(GC, 0, mmDC_EDC_CSINVOC_CNT),
145 SOC15_REG_ENTRY(GC, 0, mmDC_EDC_CSINVOC_CNT),
amdgpu_gfx_v9_0.c 4123 { SOC15_REG_ENTRY(GC, 0, mmDC_EDC_CSINVOC_CNT), 0, 1, 1},
5673 { "DC_CSINVOC", SOC15_REG_ENTRY(GC, 0, mmDC_EDC_CSINVOC_CNT),
amdgpu_gfx_v8_0.c 1504 mmDC_EDC_CSINVOC_CNT,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_8_0_d.h 2825 #define mmDC_EDC_CSINVOC_CNT 0x3192

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