HomeSort by: relevance | last modified time | path
    Searched refs:mmDC_GPU_TIMER_READ (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h 1279 #define mmDC_GPU_TIMER_READ 0x1929
dce_8_0_d.h 1299 #define mmDC_GPU_TIMER_READ 0x1929
dce_10_0_d.h 1586 #define mmDC_GPU_TIMER_READ 0x482b
dce_11_0_d.h 1411 #define mmDC_GPU_TIMER_READ 0x482b
dce_11_2_d.h 1491 #define mmDC_GPU_TIMER_READ 0x482b
dce_12_0_offset.h 1884 #define mmDC_GPU_TIMER_READ 0x20a9
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
dcn_1_0_offset.h 1076 #define mmDC_GPU_TIMER_READ 0x0128
    [all...]
dcn_2_1_0_offset.h 712 #define mmDC_GPU_TIMER_READ 0x0128
    [all...]
dcn_2_0_0_offset.h 750 #define mmDC_GPU_TIMER_READ 0x0128
    [all...]

Completed in 280 milliseconds