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Searched refs:mmDP5_DP_DPHY_BS_SR_SWAP_CNTL (Results 1 - 8 of 8) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce100/
amdgpu_dce100_resource.c	`96 #define mmDP5_DP_DPHY_BS_SR_SWAP_CNTL 0x4FDC`
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
amdgpu_dce110_resource.c	`103 #define mmDP5_DP_DPHY_BS_SR_SWAP_CNTL 0x4FDC`
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/
amdgpu_dce112_resource.c	`95 #define mmDP5_DP_DPHY_BS_SR_SWAP_CNTL 0x4FDC`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_11_0_d.h	`4564 #define mmDP5_DP_DPHY_BS_SR_SWAP_CNTL 0x4fdc`
dce_11_2_d.h	`5796 #define mmDP5_DP_DPHY_BS_SR_SWAP_CNTL 0x4fdc`
dce_12_0_offset.h	`[all...]`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
dcn_1_0_offset.h	`9999 #define mmDP5_DP_DPHY_BS_SR_SWAP_CNTL 0x2644 [all...]`
dcn_2_0_0_offset.h	`[all...]`

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