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    Searched refs:mmDPGV1_WATERMARK_MASK_CONTROL (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
amdgpu_dce110_mem_input_v.c 737 mmDPGV1_WATERMARK_MASK_CONTROL,
820 mmDPGV1_WATERMARK_MASK_CONTROL,
923 mmDPGV1_WATERMARK_MASK_CONTROL,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_11_0_d.h 6614 #define mmDPGV1_WATERMARK_MASK_CONTROL 0x473f
dce_11_2_d.h 7929 #define mmDPGV1_WATERMARK_MASK_CONTROL 0x473f

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