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    Searched refs:mmGCRD_SA_TARGETS_DISABLE (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v10_0.c 1708 tmp = RREG32_SOC15(GC, 0, mmGCRD_SA_TARGETS_DISABLE);
1712 WREG32_SOC15(GC, 0, mmGCRD_SA_TARGETS_DISABLE, tmp);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 3162 #define mmGCRD_SA_TARGETS_DISABLE 0x158b
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