HomeSort by: relevance | last modified time | path
    Searched refs:mmGCVM_CONTEXT0_CNTL (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfxhub_v2_0.c 184 tmp = RREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL);
189 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL, tmp);
297 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL, i, 0);
371 SOC15_REG_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 3270 #define mmGCVM_CONTEXT0_CNTL 0x1620
    [all...]

Completed in 40 milliseconds