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    Searched refs:mmGCVM_L2_CNTL2 (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfxhub_v2_0.c 157 tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2);
160 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2, tmp);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 3198 #define mmGCVM_L2_CNTL2 0x15e1
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