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Searched refs:mmGDS_PS0_CTXSW_CNT3 (Results 1 - 5 of 5) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_8_0_d.h	`2545 #define mmGDS_PS0_CTXSW_CNT3 0x335a`
gfx_8_1_d.h	`2524 #define mmGDS_PS0_CTXSW_CNT3 0x335a`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`3210 #define mmGDS_PS0_CTXSW_CNT3 0x135a`
gc_9_1_offset.h	`3440 #define mmGDS_PS0_CTXSW_CNT3 0x135a`
gc_9_2_1_offset.h	`3390 #define mmGDS_PS0_CTXSW_CNT3 0x135a`

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