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Searched refs:mmHDP_MEM_POWER_CTRL (Results 1 - 3 of 3) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/hdp/
hdp_5_0_0_offset.h	`64 #define mmHDP_MEM_POWER_CTRL 0x00d4`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_nv.c	`855 hdp_mem_pwr_cntl = RREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL); 883 WREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl); 910 WREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl); 1002 tmp = RREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL);`
amdgpu_soc15.c	`93 #define mmHDP_MEM_POWER_CTRL 0x00d4 1383 def = data = RREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_CTRL)); 1397 WREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_CTRL), data);`

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