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Searched refs:mmLB_SYNC_RESET_SEL (Results 1 - 6 of 6) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
amdgpu_dce110_compressor.c	`94 value = dm_read_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL)); 97 dm_write_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL), value); 111 value = dm_read_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL)); 114 dm_write_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL), value);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h	`3946 #define mmLB_SYNC_RESET_SEL 0x1ACA`
dce_8_0_d.h	`4623 #define mmLB_SYNC_RESET_SEL 0x1acc`
dce_10_0_d.h	`5304 #define mmLB_SYNC_RESET_SEL 0x1acc`
dce_11_0_d.h	`5362 #define mmLB_SYNC_RESET_SEL 0x1acc`
dce_11_2_d.h	`6619 #define mmLB_SYNC_RESET_SEL 0x1acc`

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