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    Searched refs:mmMAILBOX_CONTROL (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_mxgpu_vi.c 328 reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL);
330 WREG32_NO_KIQ(mmMAILBOX_CONTROL, reg);
333 reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL);
342 reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL);
350 reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL);
353 WREG32_NO_KIQ(mmMAILBOX_CONTROL, reg);
377 reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL);
398 reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL);
408 reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
bif_5_0_d.h 188 #define mmMAILBOX_CONTROL 0x14d0
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbif/
nbif_6_1_offset.h 1151 #define mmMAILBOX_CONTROL 0x0e5e // duplicate
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
nbio_7_0_offset.h 4502 #define mmMAILBOX_CONTROL 0x013e
nbio_7_4_offset.h 2932 #define mmMAILBOX_CONTROL 0x013e

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