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    Searched refs:mmMCIF_WB1_MCIF_WB_SELF_REFRESH_CONTROL (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
dcn_1_0_offset.h 1558 #define mmMCIF_WB1_MCIF_WB_SELF_REFRESH_CONTROL 0x0318
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dcn_2_1_0_offset.h 1144 #define mmMCIF_WB1_MCIF_WB_SELF_REFRESH_CONTROL 0x0318
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dcn_2_0_0_offset.h 1182 #define mmMCIF_WB1_MCIF_WB_SELF_REFRESH_CONTROL 0x0318
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  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_12_0_offset.h 394 #define mmMCIF_WB1_MCIF_WB_SELF_REFRESH_CONTROL 0x02d8
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