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Searched refs:mmMMEA1_DRAM_RD_PRI_QUEUING_BASE_IDX (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mmhub/
mmhub_1_0_offset.h	`863 #define mmMMEA1_DRAM_RD_PRI_QUEUING_BASE_IDX 0`
mmhub_9_1_offset.h	`863 #define mmMMEA1_DRAM_RD_PRI_QUEUING_BASE_IDX 0`
mmhub_9_3_0_offset.h	`865 #define mmMMEA1_DRAM_RD_PRI_QUEUING_BASE_IDX 0`
mmhub_9_4_1_offset.h	`1787 #define mmMMEA1_DRAM_RD_PRI_QUEUING_BASE_IDX 1`

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