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    Searched refs:mmMMVM_L2_CNTL3 (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_mmhub_v2_0.c	159 WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL3, tmp); 301 WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL3, 0);
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mmhub/
mmhub_2_0_0_offset.h	1016 #define mmMMVM_L2_CNTL3 0x0682

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