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Searched refs:mmPHYPLLA_PIXCLK_RESYNC_CNTL (Results 1 - 5 of 5) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_11_2_d.h	`1071 #define mmPHYPLLA_PIXCLK_RESYNC_CNTL 0x100`
dce_12_0_offset.h	`652 #define mmPHYPLLA_PIXCLK_RESYNC_CNTL 0x0040 [all...]`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
dcn_1_0_offset.h	`466 #define mmPHYPLLA_PIXCLK_RESYNC_CNTL 0x0040 [all...]`
dcn_2_1_0_offset.h	`154 #define mmPHYPLLA_PIXCLK_RESYNC_CNTL 0x0040 [all...]`
dcn_2_0_0_offset.h	`134 #define mmPHYPLLA_PIXCLK_RESYNC_CNTL 0x0040 [all...]`

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