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Searched refs:mmPHYPLLC_PIXCLK_RESYNC_CNTL (Results 1 - 5 of 5) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_11_2_d.h	`1073 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL 0x102`
dce_12_0_offset.h	`656 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL 0x0042 [all...]`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
dcn_1_0_offset.h	`470 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL 0x0042 [all...]`
dcn_2_1_0_offset.h	`158 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL 0x0042 [all...]`
dcn_2_0_0_offset.h	`138 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL 0x0042 [all...]`

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