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    Searched refs:mmPHYPLLF_PIXCLK_RESYNC_CNTL (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_11_2_d.h 1076 #define mmPHYPLLF_PIXCLK_RESYNC_CNTL 0x13e
dce_12_0_offset.h 770 #define mmPHYPLLF_PIXCLK_RESYNC_CNTL 0x007e
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
dcn_1_0_offset.h 570 #define mmPHYPLLF_PIXCLK_RESYNC_CNTL 0x007e
    [all...]
dcn_2_0_0_offset.h 208 #define mmPHYPLLF_PIXCLK_RESYNC_CNTL 0x007e
    [all...]

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