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    Searched refs:mmPIXCLK1_RESYNC_CNTL (Results 1 - 6 of 6) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h	4058 #define mmPIXCLK1_RESYNC_CNTL 0x0138
dce_8_0_d.h	1029 #define mmPIXCLK1_RESYNC_CNTL 0x138
dce_10_0_d.h	1188 #define mmPIXCLK1_RESYNC_CNTL 0x138
dce_11_0_d.h	999 #define mmPIXCLK1_RESYNC_CNTL 0x138
dce_12_0_offset.h	758 #define mmPIXCLK1_RESYNC_CNTL 0x0078     [all...]
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
dcn_1_0_offset.h	558 #define mmPIXCLK1_RESYNC_CNTL 0x0078     [all...]

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