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    Searched refs:mmRLC_CP_SCHEDULERS (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_amdkfd_gfx_v8.c 224 value = RREG32(mmRLC_CP_SCHEDULERS);
227 WREG32(mmRLC_CP_SCHEDULERS, value);
amdgpu_gfx_v10_0.c 2970 tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS);
2973 WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp);
2975 WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp);
amdgpu_gfx_v8_0.c 4342 tmp = RREG32(mmRLC_CP_SCHEDULERS);
4345 WREG32(mmRLC_CP_SCHEDULERS, tmp);
4347 WREG32(mmRLC_CP_SCHEDULERS, tmp);
amdgpu_gfx_v9_0.c 3311 tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS);
3314 WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp);
3316 WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_8_0_d.h 1491 #define mmRLC_CP_SCHEDULERS 0xecaa
gfx_8_1_d.h 1487 #define mmRLC_CP_SCHEDULERS 0xecaa
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 6200 #define mmRLC_CP_SCHEDULERS 0x4caa
gc_9_1_offset.h 6422 #define mmRLC_CP_SCHEDULERS 0x4caa
gc_9_2_1_offset.h 6398 #define mmRLC_CP_SCHEDULERS 0x4caa
gc_10_1_0_offset.h 9510 #define mmRLC_CP_SCHEDULERS 0x4caa
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