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Searched refs:mmRLC_LB_THR_CONFIG_2 (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v9_0.c	`1719 WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_2, 0x0333A5A7); 1768 WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_2, 0x033388F8);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`6226 #define mmRLC_LB_THR_CONFIG_2 0x4cb8`
gc_9_1_offset.h	`6448 #define mmRLC_LB_THR_CONFIG_2 0x4cb8`
gc_9_2_1_offset.h	`6424 #define mmRLC_LB_THR_CONFIG_2 0x4cb8`

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