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Searched refs:mmRLC_SPM_UTCL1_CNTL (Results 1 - 5 of 5) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v9_0.c	`549 SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_UTCL1_CNTL, 0x08000000, 0x08000080), 587 SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_UTCL1_CNTL, 0x08000000, 0x08000080), 626 SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_UTCL1_CNTL, 0xff0fffff, 0x08000080),`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`6222 #define mmRLC_SPM_UTCL1_CNTL 0x4cb5`
gc_9_1_offset.h	`6444 #define mmRLC_SPM_UTCL1_CNTL 0x4cb5`
gc_9_2_1_offset.h	`6420 #define mmRLC_SPM_UTCL1_CNTL 0x4cb5`
gc_10_1_0_offset.h	`9532 #define mmRLC_SPM_UTCL1_CNTL 0x4cb5 [all...]`

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