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    Searched refs:mmRLC_SRM_ARAM_DATA (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_8_0_d.h 1458 #define mmRLC_SRM_ARAM_DATA 0xec84
gfx_8_1_d.h 1454 #define mmRLC_SRM_ARAM_DATA 0xec84
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v8_0.c 3984 WREG32(mmRLC_SRM_ARAM_DATA, adev->gfx.rlc.register_restore[i]);
amdgpu_gfx_v9_0.c 2660 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_ARAM_DATA),
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 6142 #define mmRLC_SRM_ARAM_DATA 0x4c84
gc_9_1_offset.h 6364 #define mmRLC_SRM_ARAM_DATA 0x4c84
gc_9_2_1_offset.h 6340 #define mmRLC_SRM_ARAM_DATA 0x4c84
gc_10_1_0_offset.h     [all...]

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