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Searched refs:mmSCRATCH_REG2 (Results 1 - 11 of 11) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_4_1_offset.h	`217 #define mmSCRATCH_REG2 0x2042`
gc_9_0_offset.h	`4642 #define mmSCRATCH_REG2 0x2042`
gc_9_1_offset.h	`4872 #define mmSCRATCH_REG2 0x2042`
gc_9_2_1_offset.h	`4828 #define mmSCRATCH_REG2 0x2042`
gc_10_1_0_offset.h	`7108 #define mmSCRATCH_REG2 0x2042 [all...]`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
soc15_common.h	`104 uint32_t r2 = adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG2; \`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h	`1185 #define mmSCRATCH_REG2 0x2142`
gfx_7_0_d.h	`408 #define mmSCRATCH_REG2 0xc042`
gfx_7_2_d.h	`420 #define mmSCRATCH_REG2 0xc042`
gfx_8_0_d.h	`458 #define mmSCRATCH_REG2 0xc042`
gfx_8_1_d.h	`458 #define mmSCRATCH_REG2 0xc042`

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