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    Searched refs:mmSDMA0_GFX_MINOR_PTR_UPDATE (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_1_offset.h 270 #define mmSDMA0_GFX_MINOR_PTR_UPDATE 0x00b5
sdma0_4_0_offset.h 274 #define mmSDMA0_GFX_MINOR_PTR_UPDATE 0x00b5
sdma0_4_2_2_offset.h 274 #define mmSDMA0_GFX_MINOR_PTR_UPDATE 0x00b5
sdma0_4_2_offset.h 270 #define mmSDMA0_GFX_MINOR_PTR_UPDATE 0x00b5
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_sdma_v5_0.c 680 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 1);
707 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 0);
amdgpu_sdma_v4_0.c 1126 WREG32_SDMA(i, mmSDMA0_GFX_MINOR_PTR_UPDATE, 1);
1142 WREG32_SDMA(i, mmSDMA0_GFX_MINOR_PTR_UPDATE, 0);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 264 #define mmSDMA0_GFX_MINOR_PTR_UPDATE 0x00b5
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