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    Searched refs:mmSDMA0_PHASE2_QUANTUM (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_0_offset.h 174 #define mmSDMA0_PHASE2_QUANTUM 0x004f
sdma0_4_2_2_offset.h 174 #define mmSDMA0_PHASE2_QUANTUM 0x004f
sdma0_4_2_offset.h 174 #define mmSDMA0_PHASE2_QUANTUM 0x004f
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_sdma_v5_0.c 575 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_PHASE2_QUANTUM),
amdgpu_sdma_v4_0.c 1030 WREG32_SDMA(i, mmSDMA0_PHASE2_QUANTUM, phase_quantum);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 146 #define mmSDMA0_PHASE2_QUANTUM 0x004f
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