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Searched refs:mmSDMA0_POWER_CNTL_IDLE (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_1_offset.h	`160 #define mmSDMA0_POWER_CNTL_IDLE 0x0049`
sdma0_4_0_offset.h	`162 #define mmSDMA0_POWER_CNTL_IDLE 0x0049`
sdma0_4_2_2_offset.h	`162 #define mmSDMA0_POWER_CNTL_IDLE 0x0049`
sdma0_4_2_offset.h	`162 #define mmSDMA0_POWER_CNTL_IDLE 0x0049`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_3_0_1_d.h	`209 #define mmSDMA0_POWER_CNTL_IDLE 0x3438`
oss_3_0_d.h	`334 #define mmSDMA0_POWER_CNTL_IDLE 0x342c`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h	`134 #define mmSDMA0_POWER_CNTL_IDLE 0x0049 [all...]`

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