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Searched refs:mmSDMA0_RLC0_CONTEXT_STATUS (Results 1 - 14 of 14) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_amdkfd_arcturus.c	`151 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 270 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS);`
amdgpu_amdkfd_gfx_v10.c	`449 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 698 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS);`
amdgpu_amdkfd_gfx_v7.c	`341 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 566 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS);`
amdgpu_amdkfd_gfx_v8.c	`327 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 564 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS);`
amdgpu_amdkfd_gfx_v9.c	`437 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 628 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_1_offset.h	`326 #define mmSDMA0_RLC0_CONTEXT_STATUS 0x0151`
sdma0_4_0_offset.h	`414 #define mmSDMA0_RLC0_CONTEXT_STATUS 0x0151`
sdma0_4_2_2_offset.h	`414 #define mmSDMA0_RLC0_CONTEXT_STATUS 0x0141`
sdma0_4_2_offset.h	`410 #define mmSDMA0_RLC0_CONTEXT_STATUS 0x0151`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_4_d.h	`233 #define mmSDMA0_RLC0_CONTEXT_STATUS 0x3511`
oss_2_0_d.h	`287 #define mmSDMA0_RLC0_CONTEXT_STATUS 0x3511`
oss_3_0_1_d.h	`272 #define mmSDMA0_RLC0_CONTEXT_STATUS 0x3511`
oss_3_0_d.h	`394 #define mmSDMA0_RLC0_CONTEXT_STATUS 0x3511`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h	`403 #define mmSDMA0_RLC0_CONTEXT_STATUS 0x0151 [all...]`

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