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    Searched refs:mmSDMA0_RLC0_DOORBELL (Results 1 - 14 of 14) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_amdkfd_arcturus.c 166 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data);
216 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++)
280 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, 0);
amdgpu_amdkfd_gfx_v10.c 464 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data);
514 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++)
708 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, 0);
amdgpu_amdkfd_gfx_v7.c 353 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data);
395 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++)
576 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, 0);
amdgpu_amdkfd_gfx_v8.c 339 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data);
381 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++)
574 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, 0);
amdgpu_amdkfd_gfx_v9.c 452 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data);
502 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++)
638 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, 0);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_1_offset.h 328 #define mmSDMA0_RLC0_DOORBELL 0x0152
sdma0_4_0_offset.h 416 #define mmSDMA0_RLC0_DOORBELL 0x0152
sdma0_4_2_2_offset.h 416 #define mmSDMA0_RLC0_DOORBELL 0x0142
sdma0_4_2_offset.h 412 #define mmSDMA0_RLC0_DOORBELL 0x0152
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_4_d.h 234 #define mmSDMA0_RLC0_DOORBELL 0x3512
oss_2_0_d.h 288 #define mmSDMA0_RLC0_DOORBELL 0x3512
oss_3_0_1_d.h 273 #define mmSDMA0_RLC0_DOORBELL 0x3512
oss_3_0_d.h 395 #define mmSDMA0_RLC0_DOORBELL 0x3512
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 405 #define mmSDMA0_RLC0_DOORBELL 0x0152
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