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    Searched refs:mmSDMA0_RLC0_MIDCMD_CNTL (Results 1 - 11 of 11) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_amdkfd_arcturus.c 224 reg <= mmSDMA0_RLC0_MIDCMD_CNTL; reg++)
amdgpu_amdkfd_gfx_v10.c 522 reg <= mmSDMA0_RLC0_MIDCMD_CNTL; reg++)
amdgpu_amdkfd_gfx_v8.c 392 for (reg = mmSDMA0_RLC0_MIDCMD_DATA0; reg <= mmSDMA0_RLC0_MIDCMD_CNTL;
amdgpu_amdkfd_gfx_v9.c 510 reg <= mmSDMA0_RLC0_MIDCMD_CNTL; reg++)
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_1_offset.h 374 #define mmSDMA0_RLC0_MIDCMD_CNTL 0x0189
sdma0_4_0_offset.h 462 #define mmSDMA0_RLC0_MIDCMD_CNTL 0x0189
sdma0_4_2_2_offset.h 462 #define mmSDMA0_RLC0_MIDCMD_CNTL 0x0179
sdma0_4_2_offset.h 458 #define mmSDMA0_RLC0_MIDCMD_CNTL 0x0189
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_3_0_1_d.h 292 #define mmSDMA0_RLC0_MIDCMD_CNTL 0x354a
oss_3_0_d.h 411 #define mmSDMA0_RLC0_MIDCMD_CNTL 0x3547
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 450 #define mmSDMA0_RLC0_MIDCMD_CNTL 0x0189
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